Intel: Microprocessor Report Chronicles Lead in Micro-Server, 3-D Transistors

From venerable technology newsletter Microprocessor Report, come two intriguing technical articles today discussing some of the technology advantages of the chip giant.

Intel shares today closed up 36 cents, or 1.5%, at $23.76.

The first article is by the Report’s Jag Bolaria, who notes that Intel has become more aggressive with low-power chips for so-called “micro-servers” in order to compete with forthcoming designs from licensees of ARM Holdings‘s (ARMH) instruction set architecture.

The other article is by the Report’s Tom Halfhill, who writes that contract chip manufacturersTaiwan Semiconductor Manufacturing (TSMC) and GlobalFoundries are “struggling” to catch up to Intel’s lead in process technology, as the company was first to market with three-dimensional transistors, which Intel calls “Tri-Gate,” and which the industry generall refers to as “FinFet.”

After reviewing plans laid out by Global and by TSM in February and April, respectively, Halfhill finds the milestones and plans offered leave both trailing Intel’s pace:

All the independent foundries are still scrambling to catch up with Intel. Their first FinFET processes won’t reach volume production until 2015, three years after Intel’s FinFETs made their revolutionary debut. Second, the foundries’ FinFETs will first appear in “14nm” or “16nm” processes that essentially add the three-dimensional transistors to previous-generation 20nm technology, achieving worthwhile gains in speed and power but relatively little improvement in logic density. And third, lithography costs are expected to jump dramatically after the 28nm node, potentially deterring many chip companies from moving beyond 28nm for quite a while.

Read Full Story @ Barron's Blog

TSMC 2013 Symposium: Progress in 20nm, 16nm FinFET, and 3D-IC Technologies

By Richard Goering 

The TSMC 2013 Technology Symposium, held April 9 in San Jose, California, brought good news for anyone interested in advanced node or 3D-IC technologies. Keynote speakers noted excellent yields and significant progress in 20nm planar, 16nm FinFET, and Chip-on-Wafer-on-Substrate (CoWoS) technologies, as well as promising development work with 10nm FinFET and true 3D-IC stacking.

Keynote speakers included Morris Chang, TSMC founder and CEO, who provided a semiconductor industry overview and company update (see blog post here). Subsequent keynote speeches were given by TSMC executives Jack Sun, Vice President of R&D and Chief  Technology Officer; Cliff Hou, Vice President of R&D; and J.K. Wang, Vice President of Operations, 300mm Fabs.

While TSMC has four "flavors" of its 28nm process, there is one 20nm process, 20SoC. "20nm planar HKMG [high-k metal gate] technology has already passed risk production with a very high yield and we are preparing for a very steep ramp in two GIGAFABs^TM," Sun said.

The next technology node is 10nm FinFET, which TSMC expects to release by the end of 2015. Sun said it will provide a "full node advancement" in power, performance and density compared to 16nm. What does that mean? Historically, Sun said, a new process node offers close to 2X density improvement, and can boost performance about 25%-30% at the same power. But with FinFETs, he said, TSMC can exceed that trend line and possibly provide 35% to 40% power savings at the same speed.

Read Full Story @ Cadence